In the semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
Semiconductor device fabrication includes many different processes. One such process is an Atomic Layer Deposition Process (ALD). An ALD process involves sequentially and alternatingly applying different materials to form a thin film layer on a substrate positioned within a deposition chamber. Particularly, the ALD process involves a number of cycles. Each cycle involves a deposition process and a purge process. The deposition processes for a set of cycles alternate between different types of materials being deposited. For example to form a silicon nitride layer, the deposition processes of the cycles may alternate between depositing silicon and nitrogen. The purge process for each of the cycles is used to remove material from the deposition chamber before the subsequent cycle is performed.
One type of ALD process is a Plasma-Enhanced Atomic Layer Deposition Process (PEALD). For a PEALD process, each cycle includes a plasma treatment process followed by a post-plasma purge process. The plasma treatment process provides a number of benefits to improve the quality of the ALD process. However, the plasma treatment process can increase the charge within the wafer. The excessive charge on the wafer may adversely affect subsequent processing steps.